The present invention relates to an MOS-type solid state imaging device, and more particularly to an MOS-type solid state imaging device having improved sensitivity. Further, the present invention relates to a system using the MOS-type solid state imaging device having improved sensitivity.
This application is based on Japanese Patent Application No. 8-248361, filed on Sep. 19, 1996, Japanese Patent Application No. 9-61041, filed on Mar. 14, 1997, and Japanese Patent Application No. 9-203816, filed on Jul. 14, 1997, the content of which is incorporated herein by reference.
Since the semiconductor device technique has been progressed, video cameras have been reduced in size and weight thereof and thus significant portability enabling wide use has been achieved. In a case of an electronic apparatus, a battery cell is employed as the power source because the portability must be retained. Hitherto, the video camera has employed a CCD sensor to serve as the image device. However, the CCD sensor requires a plurality of voltage levels when operated. Thus, a power supply circuit must be provided to generate the required voltage levels from the battery. The foregoing structure prevents further reduction of the size of the video camera. What is worse, electric power consumption cannot be reduced.
In order to further easily operate the video camera, size and weight reductions have been attempted. To obtain an image having an excellent quality, a solid state imaging devices have been researched and developed which have a larger number of pixels. To reduce the size and weight of the video camera, the size of the solid state imaging device must be reduced. Moreover, the electric power consumption must be reduced and the required voltage level must be lowered.
To simply reduce the size and enlarge the number of the pixels of the solid state imaging device, each pixel is required to be fined. However, if the pixel is fined, there arises a problem in that the quantity of a signal charge which can be treated by the pixel is reduced. As a result, there arises problems in that the dynamic range of the solid state imaging device is reduced and thus a clear image having an excellent resolution cannot be obtained.
Since a CCD requires a plurality of voltage levels when operated, a simple system cannot be realized in terms of the structure of the camera system and handling of the system. That is, to apply the CCD to a portable camera or a camera to be mounted on a personal computer, there arises a requirement for a solid state imaging device which is capable of reducing the electric power consumption and lowering the required voltage level, which exhibits excellent S/N ratio and which can be operated by a single power source. However, the CCD cannot be operated by a single power source, the electric power consumption cannot be reduced and the required voltage level cannot be lowered. What is worse, the S/N ratio deteriorates if the pixel is fined. Therefore, the CCD cannot meet the above-mentioned requirements.
To meet the above-mentioned requirements, it might be considered to employ an MOS-type solid state imaging device which is capable of reducing the electric power consumption and lowering the required voltage level and which can be operated by a single power source.
The MOS-type solid state imaging device has cells in each of which a signal detected by a photodiode is amplified by a transistor. The MOS-type solid state imaging device has an advantage of high sensitivity. Therefore, the MOS-type solid state imaging device is also called an amplifying type solid state imaging device.
The MOS sensor is manufactured by an MOS process which is widely used to manufacture semiconductor memories, such as DRAMs, and processors, though the CCD sensor is manufactured by a special process. Therefore, the MOS sensor has an advantage that it can be formed on the same semiconductor chip on which the semiconductor memory or a processor is formed or the same manufacturing line for the semiconductor memory or the processor can be used.
However, the conventional MOS sensor using the amplifying transistor has a problem in that the high photoelectric conversion gain cannot easily be obtained in a circumstance that high resolutions have been required by users, that is, high concentration and fine pixels have been required. Therefore, the gain must be raised.
Moreover, the amplifying type MOS sensor has poor dynamic range of about 60 dB which is unsatisfactory level as compared with 90 dB which can be realized by a silver salt photographic film and 70 dB which can be realized by the CCD sensor. Therefore, the amplifying type MOS sensor cannot be combined with the image system unit, such as the video camera, in a viewpoint of practical use when a satisfactory result is attempted to be obtained.
FIG. 1 is a circuit diagram showing a unit cell 10 of the conventional MOS-type solid state imaging device. FIG. 2 is a plan view thereof.
A signal charge generated by photoelectric conversion at a photodiode 1 is read to a gate of an amplifying transistor 4 when a read-out line 2 is made to a high level to turn a read-out transistor 3 on so that the potential of the gate thereof is changed. The potential of a vertical signal line 5 is changed in accordance with the potential of the gate of the amplifying transistor 4.
After the signal has been read, a gate wiring 7 of a reset transistor 6 is made to be a high level so that the potential of the gate of the amplifying transistor 4 is reset to a desired level. Addressing to the unit cell 10 is performed by using an address transistor 9, in series, coupled to the drain of the amplifying transistor 4.
Photoelectric conversion gain g [V/electron] of a unit cell 10 of an MOS-type solid state imaging device provided with a read-out transistor 3 is generated expressed by the following equation:
g[V/electron]=xcex94V/electron =1.6xc3x9710xe2x88x9219/Csnxe2x80x83xe2x80x83(1)
where Csn is a capacitor of a detection portion which is the sum of the capacitor of the gate of the amplifying transistor and the substrate capacitor of the drain of the read-out transistor. In actual, the capacitor of the detection portion is mainly the substrate capacitor of the drain of the read-out transistor.
To improve the sensitivity of the MOS-type solid state imaging device, the photoelectric conversion gain of the unit cell must be raised as described above. To obtain a high photoelectric conversion gain, the substrate capacitor of the drain of the read-out transistor must be reduced, as shown in Eq. (1).
Hitherto, the conventional MOS-type sensor has been formed such that one semiconductor region is provided for forming the drain capacitor. Thus, the area is too large to obtain a high photoelectric conversion gain. In the structure shown in FIG. 2, in which the reset transistor 6 for resetting the potential of the gate of the amplifying transistor 4 is connected to the drain of the read-out transistor 3, has a problem in that the substrate capacitor of the drain of the read-out transistor 3 can easily be increased.
Moreover, the above-mentioned conventional structure has another problem in that the drain of the read-out transistor 3 is substantially surrounded by the element isolation region. Since the impurity concentration of the substrate is generally high below the element isolation region, the parasitic capacitor is increased if a large portion of the drain is in contact with the element isolation region. As a result, the photoelectric conversion gain deteriorates and thus there arises a problem in that a sufficiently large dynamic range cannot be obtained.
Accordingly, it is an object of the present invention is to provide a MOS-type solid state imaging device capable of increasing the photoelectric conversion gain in a unit cell and improving the sensitivity.
Another object of the present invention is to provide an image system, such as a video camera, including an MOS-type solid state imaging device capable of raising the gain.
According to the present invention, there is provided a solid state imaging device comprising:
unit cells formed in a surface region of a semiconductor substrate, each of the unit cells comprising
a photoelectric converter,
a read-out transistor for reading a signal from the photoelectric converter,
an amplifying transistor having a gate connected to a drain of the read-out transistor and for amplifying the signal read by the read-out transistor,
a reset transistor having a source connected to the drain of the read-out transistor and for resetting a potential of a gate of the amplifying transistor, and
an addressing element connected in series to the amplifying transistor and for selecting the unit cell,
wherein the read-out transistor is formed in a first device region in the semiconductor substrate, the reset transistor is formed in a second device region in the semiconductor substrate and the drain of the read-out transistor is connected to the source of the reset transistor through a wiring layer formed on the surface of the semiconductor substrate.
According to the solid state imaging device according to the present invention, enlargement of the region for the read-out transistor can be prevented. Therefore, the substrate capacitor of the drain can be reduced and thus the photoelectric conversion gain can be raised.
Additional objects and advantages of the present invention will be, set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the present invention.
The objects and advantages of the present invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out in the appended claims.